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  ? semiconductor components industries, llc, 2013 june, 2013 ? rev. 1 1 publication order number: MC74HC4067A/d MC74HC4067A quad analog switch/ multiplexer/demultiplexer high ? performance silicon ? gate cmos the MC74HC4067A utilizes silicon ? gate cmos technology to achieve fast propagation delays, low on resistances, and low off ? channel leakage current. this bilateral switch/ multiplexer/demultiplexer controls analog and digital voltages that may vary across the full power ? supply range (from v cc to gnd). the on/off control inputs are co mpatible with standard cmos outputs; with pullup resistors, they are compatible with lsttl outputs. for analog switches with voltage ? level translators, see the hc4316a. features ? fast switching and propagation speeds ? high on/off output voltage ratio ? low crosstalk between switches ? diode protection on all inputs/outputs ? wide power ? supply voltage range (v cc ? gnd) = 2.0 to 6.0 v ? analog input voltage range (v cc ? gnd) = 0 to 6.0 v ? improved linearity and lower on resistance over input voltage ? low noise ? these are pb ? free devices http://onsemi.com marking diagrams a = assembly location l, wl = wafer lot y, yy = year w, ww = work week g = pb ? free package see detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. ordering information tssop ? 24 dt suffix case 948h 24 1 soic ? 24 dw suffix case 751e 24 1 hc4067ag awlyww 1 24 hc 4067ag alyw 1 24 (note: microdot may be in either location) free datasheet http:///
MC74HC4067A http://onsemi.com 2 figure 1. pin assignment figure 2. function diagram pn i 0 9 pn i 15 16 14 ? output circuits same as above (with analog inputs) i 1 to i 14 binary 1 of 16 decoder s n = 5 stages e = 4 stages 13 s 3 s 2 s 1 s 0 e 15 1 output input/ commo n 14 11 10 truth table s0 s1 s2 s3 e selected channel 1 none 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 h= high level l= low level x= don?t care top view 1 2 3 4 5 6 7 8 9 10 11 12 common i 7 i 6 i 5 i 4 i 3 i 2 i 1 i 0 s 0 s 1 gnd 16 17 18 19 20 21 22 23 24 15 14 13 v cc i 9 i 10 i 11 i 12 i 14 e s 2 s 3 i 8 i 13 i 15 input/output x 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 x 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 x 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 x 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 free datasheet http:///
MC74HC4067A http://onsemi.com 3 maximum ratings symbol parameter value unit v cc dc supply voltage ? 0.5 to +7.0 v v is analog input voltage ? 0.5 to v cc + 0.5 v v in digital input voltage ? 0.5 to v cc + 0.5 v i ik input clamping current v in < ? 0.5 v or v in > v cc + 0.5 v 20 ma i sk switch input clamping current v is < ? 0.5 v or v is > v cc + 0.5 v 20 ma i is dc switch current 25 ma i o dc output source / sink current 25 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature range ? 65 to +150  c t l lead temperature, 1 mm from case for 10 seconds 260  c t j junction temperature under bias +150  c  ja thermal resistance soic tssop 97 148  c/w p d power dissipation in still air at 85  c soic tssop 500 450 mw msl moisture sensitivity level 1 f r flammability rating oxygen index: 30% ? 35% ul ? 94 ? vo (0.125 in) v esd esd withstand voltage human body model (note 1) machine model (note 2) >3000 >200 v i latchup latchup performance above v cc and below gnd at 85  c (note 3) 100 ma stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. tested to eia/jesd22 ? a114 ? a. 2. tested to eia/jesd22 ? a115 ? a. 3. tested to eia/jesd78. recommended operating conditions symbol parameter min max unit v cc positive dc supply voltage (referenced to gnd) 2.0 6.0 v v is analog input voltage (referenced to gnd) gnd v cc v v in digital input voltage (referenced to gnd) gnd v cc v v io * static or dynamic voltage across switch ? 1.2 v t a operating temperature, all package types ?55 +125 c t r , t f input rise and fall rate (digital inputs) v cc = 2.0 v v cc = 3.0 v v cc = 4.5 v v cc = 6.0 v 0 0 0 0 1000 600 500 400 ns *for voltage drops across the switch greater than 1.2 v (switch on), excessive v cc current may be drawn; i.e., the current out of the switch may contain both v cc and switch input components. the reliability of the device will be unaffected unless the maximum ratings are exceeded. free datasheet http:///
MC74HC4067A http://onsemi.com 4 dc electrical characteristic digital section (voltages referenced to gnd) symbol parameter conditions v cc (v) guaranteed limit unit 25 c ? 40 to 85 c ? 55 to 125 c min typ max min max min max v ih minimum high ? level input voltage, channel ? select or enable inputs 2.0 3.0 4.5 6.0 1.5 2.1 3.15 4.2 1.5 2.1 3.15 4.2 1.5 2.1 3.15 4.2 v v il maximum low ? level input voltage, channel ? select or enable inputs 2.0 3.0 4.5 6.0 0.5 0.9 1.35 1.8 0.5 0.9 1.35 1.8 0.5 0.9 1.35 1.8 v i in input leakage current, control inputs v in = v cc or gnd 6.0 0.1 1.0 1.0  a i cc maximum supply current per package v in = v cc or gnd, i o =0 v is = gnd or v cc , v os = v cc or gnd 6.0 4.0 40 80  a r on on resistance i o = 1 ma v in = v cc or gnd, v is = v cc or gnd 4.5 6.0 70 60 160 140 200 175 240 210  r on(peak) on resistance (peak) i o = 1 ma v in = v cc to gnd, v is = v cc to gnd 4.5 6.0 90 80 180 160 225 200 270 240   r on on resistance mismatch between any 2 switches 4.5 6.0 10 8.5  i off off ? state leakage current, all channels sw off, v is = v cc or gnd 6.0 0.8 8 8  a i on on ? state leakage current sw off, v is = v cc or gnd 6.0 0.8 8 8  a free datasheet http:///
MC74HC4067A http://onsemi.com 5 ac characteristics (input t r , t f = 6 ns) symbol parameter conditions v cc (v) guaranteed limits unit 25  c ?40 to 85  c ?55 to 125  c min typ max min max min max t plh , t phl propagation delay switch in to out c l = 50 pf 2.0 4.5 6.0 75 15 13 95 19 16 110 22 19 ns c l = 15 pf 5.0 6.0 t on switch turn ? on time ns e to out c l = 50 pf 2.0 4.5 6.0 275 55 47 345 69 59 415 83 71 c l = 15 pf 5.0 23 sn to out c l = 50 pf 2.0 4.5 6.0 300 60 51 375 75 64 450 90 76 c l = 15 pf 5.0 25 t off switch turn ? off time ns e to out c l = 50 pf 2.0 4.5 6.0 275 55 47 345 69 59 415 83 71 c l = 15 pf 5.0 23 sn to out c l = 50 pf 2.0 4.5 6.0 290 58 49 365 73 62 435 87 74 c l = 15 pf 5.0 21 c in input capacitance, control pins 3.5 10 10 10 pf c pd power dissipation capacitance (note 4) c l = 15 pf 5.0 29 pf 4. c pd is used to determine the dynamic power consumption, per multivibrator. free datasheet http:///
MC74HC4067A http://onsemi.com 6 analog switch channel characteristics symbol parameter conditions v cc (v) limit* 25 c unit bw maximum on ? channel bandwidth or minimum frequency response f in = 1 mhz sine wave adjust f in voltage to obtain 0 dbm at v os increase f in frequency until db meter reads ? 3 db r l = 50  , c l = 10 pf 4.5 90 mhz ? off ? channel feedthrough isolation f in  sine wave adjust f in voltage to obtain 0 dbm at v is f in = 10 khz, r l = 600  , c l = 50 pf f in = 1.0 mhz, r l = 50  , c l = 10 pf 4.5 4.5 ? 65 ? 75 db ? feedthrough noise e , sn to switch v in  1 mhz square wave (t r = t f = 6 ns) adjust r l at setup so that i s = 0 a r l = 600  , c l = 50 pf r l = 10 k  , c l = 10 pf 4.5 4.5 60 30 mv pp ? crosstalk between any two switches f in  sine wave adjust f in voltage to obtain 0 dbm at v is f in = 10 khz, r l = 600  , c l = 50 pf f in = 1.0 mhz, r l = 50  , c l = 10 pf 4.5 4.5 ?70 ?80 db thd total harmonic distortion f in = 1 khz, r l = 10 k  , c l = 50 pf thd = thd measured ? thd source v is = 4.0 v pp sine wave 4.5 0.04 % c s switch input capacitance 5 pf c com switch common capacitance 45 pf *limits not tested. determined by design and verified by qualification. free datasheet http:///
MC74HC4067A http://onsemi.com 7 typical characteristics figure 3. typical on resistance, v cc = 4.5 v v is , input voltage (volts), referenced to ground r on @ 4.5 v 4.5 4 3.5 2 1.5 1 0.5 0 0 20 40 60 80 100 120 2.5 3 125 c v is , input voltage (volts), referenced to ground r on @ 6.0 v 4 3 2 1 0 0 10 20 30 40 50 60 80 56 figure 4. typical on resistance, v cc = 6.0 v figure 5. typical switch frequency response figure 6. typical switch off signal feedthrough vs frequency f, frequency (khz) 100 ? 10 ? 9 ? 8 ? 7 v os (db) ? 6 ? 5 ? 3 ? 2 ? 1 0 ? 4 v cc = 4.5 v r l = 50  t a = 25 c 25 c ? 55 c 70 1000 10000 100000 f, frequency (khz) 10 ? 10 ? 9 ? 8 ? 7 switch off signal feedthrough (db) ? 6 ? 5 ? 3 ? 2 ? 1 0 ? 4 v cc = 4.5 v r l = 50  t a = 25 c 100 1000 10000 100000 125 c 25 c ? 55 c free datasheet http:///
MC74HC4067A http://onsemi.com 8 figure 7. on resistance test setup plotter mini computer programmable power supply dc analyzer v cc + - analog in common out gnd device under test figure 8. off channel leakage current test setup, any one channel off 7 14 v cc a v cc gnd v cc selected control input v il figure 9. on channel leakage current test setup on 14 v cc n/c a gnd v cc 7 selected control input v ih v cc gnd analog in analog out 50% t plh t phl 50% figure 10. propagation delay, analog in to analog out figure 11. propagation delay test setup on 14 v cc *includes all probe and jig capacitance. test point analog out analog in c l * 7 selected control input v cc free datasheet http:///
MC74HC4067A http://onsemi.com 9 positionwhen testing t plz and t pzl t r t f v cc gnd high impedance v ol v oh high impedance control analog out 90% 50% 10% 50% 50% 10% 90% t pzh t phz t pzl t plz figure 12. turn ? on / turn ? off times on/off v cc test point 14 v cc 1 k  positionwhen testing t phz and t pzh c l * 1 2 1 2 figure 13. turn ? on / turn ? off time test setup 1 2 7 selected control input figure 14. power dissipation capacitance test setup 14 v cc n/c off/on a n/c 7 selected control input on/off control *includes all probe and jig capacitance. figure 15. on channel bandwidth test setup on 14 v cc 0.1  f c l * f in db meter *includes all probe and jig capacitance. v os 7 selected control input v cc figure 16. off channel feedthrough isolation test setup off 7 14 v cc 0.1  f c l * f in db meter *includes all probe and jig capacitance. v os r l v is selected control input figure 17. feedthrough noise test setup 14 v cc c l * *includes all probe and jig capacitance. off/on v in 1 mhz t r = t f = 6 ns control v cc/2 r l i s r l v os 7 selected control input v cc/2 v cc gnd free datasheet http:///
MC74HC4067A http://onsemi.com 10 figure 18. crosstalk between any two switches test setup r l on 14 v cc or gnd c l * *includes all probe and jig capacitance. off r l r l v is r l c l * v os f in 0.1  f v cc/2 v cc/2 7 selected control input v cc/2 on v cc 0.1  f c l * f in r l to distortion meter *includes all probe and jig capacitance. v os v is 7 selected control input v cc figure 19. total harmonic distortion test setup v cc v cc/2 ordering information device package shipping ? MC74HC4067Adwg soic ? 24 (pb ? free) 30 units / tube MC74HC4067Adwr2g soic ? 24 (pb ? free) 1000 / tape & reel MC74HC4067Adtg tssop ? 24 (pb ? free) 62 units / tube MC74HC4067Adtr2g tssop ? 24 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. free datasheet http:///
MC74HC4067A http://onsemi.com 11 package dimensions soic ? 24 wb case 751e ? 04 issue f b m 0.25 c seating plane a1 m l detail a end view h  notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimensions b and c apply to the flat sec- tion of the lead and are measured between 0.10 and 0.25 from the lead tip. 4. dimensions d and e1 do not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 mm per side. interlead flash or protrusion shall not exceed 0.25 per side. dimensions d and e1 are determined at datum h. 5. a1 is defined as the vertical distance from the seating plane to the lowest point on the package body. note 3 pin 1 12 1 24 13 top view dim min max millimeters a 2.35 2.65 b 0.35 0.49 e 1.27 bsc h 0.25 0.75 c 0.23 0.32 a1 0.13 0.29 l 0.41 0.90 m 0 8   d e1 side view 11.00 24x 0.52 24x 1.62 1.27 dimensions: millimeters 1 pitch *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* e 10.30 bsc recommended indicator a b 0.25 c 24x b a c a note 5 x 45 c note 3 detail a c h d 15.25 15.54 e1 7.40 7.60 e s s e free datasheet http:///
MC74HC4067A http://onsemi.com 12 package dimensions tssop24 7.8x4.4, 0.65p case 948h issue b dim d min max 7.90 millimeters e1 4.30 4.50 a 1.20 a1 0.05 0.15 l 0.50 0.75 e 0.65 bsc c 0.09 0.20 b 0.19 0.30 l2 0.25 bsc m 0 8  notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b does not include dambar protrusion. dambar protrusion shall be 0.08 max at mmc. dambar cannot be located on the lower radius of the foot. 4. dimension d does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 per side. dimension d is determined at datum plane h. 5. dimension e1 does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 per side. dimension e1 is determined at datum plane h. 6. datums a and b are determined at datum plane h. 7. a1 is defined as the vertical distance from the seating plane to the lowest point on the package body. 7.70 --- 24x 1.15 24x 0.42 0.65 dimensions: millimeters pitch soldering footprint e 6.40 bsc 6.70 recommended l l2 gauge detail a plane c detail a m end view c h 0.10 seating plane side view a c 0.05 c c 24x a1 pin 1 reference d e1 24x b e b m 0.10 a c top view b 0.15 c 112 13 24 a b note 3 2x 12 tips e note 6 note 6 note 4 note 5 s s s on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 MC74HC4067A/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative free datasheet http:///


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